As a result, in order to ensure enough bandwidth remains available, memory latencies increase. In today’s SoCs, the DDR system memory is a shared resource, for example for audio, video, graphics and program code. Synopsys’ 32-bit DesignWare ARC audio processors are further optimized for even better SoC performance. Typically audio processors have hardware architectures that are tailored for audio processing, reducing not just the power but also the overall silicon cost. This means that for use-cases with multiple streams of multi-channel, high-definition audio, the total processor load is not just 10 MHz for MP3 decoding, but may be up to 250 MHz or more, with the total overall power reduction savings easily reaching up to 250 * (0.3125-0.0735) mW/MHz = 60mW!
#ACCPLUS V2 PORTABLE#
Additional tasks include audio enrichment (post-processing) software for virtual surround sound effects on tablets and other portable devices. In most consumer devices like digital TVs, set-top boxes and Blu-ray Disc players, however, multiple audio decoding and encoding tasks have to run simultaneously.
More precisely, MP3 decoding on an ARM Cortex-A9 and NEON in a TSMC 40G process consumes 0.3125mW/MHz per core 3, whereas the ARC AS211SFX consumes only 0.0735 mW/MHz 4. For example offloading MPEG-2 Audio Layer III, or MP3, decoding from a power-optimized ARM® Cortex™-A9 dual-core processor with NEON extensions (3.13mW / 10MHz) 1, 2to a DesignWare® ARC AS211SFX processor (0.27mW / 7MHz) results in a power reduction of about 3mW. We typically see an 80% reduction in power consumption when offloading an audio function from the host. Tasks like audio encoding and decoding, as well as post-processing can be handled more efficiently by processors that have been specifically designed for this. Offloading audio processing from a host processor in the system to more efficient audio processors is common practice these days.
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